; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -enable-machine-outliner -mtriple=msp430-unknown-linux < %s | FileCheck %s

; NOTE: Machine outliner doesn't run.
@x = global i32 0, align 4

define dso_local i32 @check_boundaries() #0 {
; CHECK-LABEL: check_boundaries:
; CHECK:         .cfi_startproc
; CHECK-NEXT:  ; %bb.0:
; CHECK-NEXT:    push r4
; CHECK-NEXT:    .cfi_def_cfa_offset 4
; CHECK-NEXT:    .cfi_offset r4, -4
; CHECK-NEXT:    mov r1, r4
; CHECK-NEXT:    .cfi_def_cfa_register r4
; CHECK-NEXT:    sub #20, r1
; CHECK-NEXT:    clr -6(r4)
; CHECK-NEXT:    clr -8(r4)
; CHECK-NEXT:    clr -2(r4)
; CHECK-NEXT:    clr -4(r4)
; CHECK-NEXT:    clr r12
; CHECK-NEXT:    tst r12
; CHECK-NEXT:    jeq .LBB0_2
; CHECK-NEXT:  ; %bb.1:
; CHECK-NEXT:    clr -14(r4)
; CHECK-NEXT:    mov #1, -16(r4)
; CHECK-NEXT:    jmp .LBB0_3
; CHECK-NEXT:  .LBB0_2:
; CHECK-NEXT:    clr -10(r4)
; CHECK-NEXT:    mov #2, -12(r4)
; CHECK-NEXT:    clr -6(r4)
; CHECK-NEXT:    mov #1, -8(r4)
; CHECK-NEXT:    clr -14(r4)
; CHECK-NEXT:    mov #3, -16(r4)
; CHECK-NEXT:    clr -18(r4)
; CHECK-NEXT:    mov #4, -20(r4)
; CHECK-NEXT:  .LBB0_3:
; CHECK-NEXT:    mov -8(r4), r12
; CHECK-NEXT:    bis -6(r4), r12
; CHECK-NEXT:    tst r12
; CHECK-NEXT:    jeq .LBB0_5
; CHECK-NEXT:  ; %bb.4:
; CHECK-NEXT:    clr -14(r4)
; CHECK-NEXT:    mov #1, -16(r4)
; CHECK-NEXT:    jmp .LBB0_6
; CHECK-NEXT:  .LBB0_5:
; CHECK-NEXT:    clr -10(r4)
; CHECK-NEXT:    mov #2, -12(r4)
; CHECK-NEXT:    clr -6(r4)
; CHECK-NEXT:    mov #1, -8(r4)
; CHECK-NEXT:    clr -14(r4)
; CHECK-NEXT:    mov #3, -16(r4)
; CHECK-NEXT:    clr -18(r4)
; CHECK-NEXT:    mov #4, -20(r4)
; CHECK-NEXT:  .LBB0_6:
; CHECK-NEXT:    clr r12
; CHECK-NEXT:    clr r13
; CHECK-NEXT:    add #20, r1
; CHECK-NEXT:    pop r4
; CHECK-NEXT:    .cfi_def_cfa r1, 2
; CHECK-NEXT:    ret
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  store i32 0, i32* %1, align 4
  store i32 0, i32* %2, align 4
  %6 = load i32, i32* %2, align 4
  %7 = icmp ne i32 %6, 0
  br i1 %7, label %9, label %8

  store i32 1, i32* %2, align 4
  store i32 2, i32* %3, align 4
  store i32 3, i32* %4, align 4
  store i32 4, i32* %5, align 4
  br label %10

  store i32 1, i32* %4, align 4
  br label %10

  %11 = load i32, i32* %2, align 4
  %12 = icmp ne i32 %11, 0
  br i1 %12, label %14, label %13

  store i32 1, i32* %2, align 4
  store i32 2, i32* %3, align 4
  store i32 3, i32* %4, align 4
  store i32 4, i32* %5, align 4
  br label %15

  store i32 1, i32* %4, align 4
  br label %15

  ret i32 0
}

define dso_local i32 @main() #0 {
; CHECK-LABEL: main:
; CHECK:         .cfi_startproc
; CHECK-NEXT:  ; %bb.0:
; CHECK-NEXT:    push r4
; CHECK-NEXT:    .cfi_def_cfa_offset 4
; CHECK-NEXT:    .cfi_offset r4, -4
; CHECK-NEXT:    mov r1, r4
; CHECK-NEXT:    .cfi_def_cfa_register r4
; CHECK-NEXT:    sub #20, r1
; CHECK-NEXT:    clr &x+2
; CHECK-NEXT:    mov #1, &x
; CHECK-NEXT:    clr -2(r4)
; CHECK-NEXT:    clr -4(r4)
; CHECK-NEXT:    clr -6(r4)
; CHECK-NEXT:    mov #1, -8(r4)
; CHECK-NEXT:    clr -10(r4)
; CHECK-NEXT:    mov #2, -12(r4)
; CHECK-NEXT:    clr -14(r4)
; CHECK-NEXT:    mov #3, -16(r4)
; CHECK-NEXT:    clr -18(r4)
; CHECK-NEXT:    mov #4, -20(r4)
; CHECK-NEXT:    ;APP
; CHECK-NEXT:    ;NO_APP
; CHECK-NEXT:    clr -10(r4)
; CHECK-NEXT:    mov #2, -12(r4)
; CHECK-NEXT:    clr -6(r4)
; CHECK-NEXT:    mov #1, -8(r4)
; CHECK-NEXT:    clr -14(r4)
; CHECK-NEXT:    mov #3, -16(r4)
; CHECK-NEXT:    clr -18(r4)
; CHECK-NEXT:    mov #4, -20(r4)
; CHECK-NEXT:    clr r12
; CHECK-NEXT:    clr r13
; CHECK-NEXT:    add #20, r1
; CHECK-NEXT:    pop r4
; CHECK-NEXT:    .cfi_def_cfa r1, 2
; CHECK-NEXT:    ret
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4

  store i32 0, i32* %1, align 4
  store i32 0, i32* @x, align 4
  store i32 1, i32* %2, align 4
  store i32 2, i32* %3, align 4
  store i32 3, i32* %4, align 4
  store i32 4, i32* %5, align 4
  store i32 1, i32* @x, align 4
  call void asm sideeffect "", "~{memory},~{dirflag},~{fpsr},~{flags}"()
  store i32 1, i32* %2, align 4
  store i32 2, i32* %3, align 4
  store i32 3, i32* %4, align 4
  store i32 4, i32* %5, align 4
  ret i32 0
}

attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
